The invention relates to a device for the bus-networked operation of an electronic unit having a microcontroller and a bus protocol module for communicating with other units via a two-core bus.
The growing number of bus-networked electronic units (for example in industrial installations and mobile units such as motor vehicles) inevitably leads to problems with regard to sufficiently reliable and/or sufficiently long operational capability when only a limited supply of electrical energy is available (for example, from the operating battery of a vehicle or the back-up battery of a production installation for emergency retention of processing status data, etc.) In order to conserve energy, it is known to switch off units which are not required for a specific operating phase.
Thus, in known motor vehicles, control units for which the current consumption is problematic when the vehicle is stopped, are supplied with current from a terminal of the ignition/start switch. When the ignition/start key is withdrawn, these units are thus removed from the on-board power supply system. Units whose operational capability is necessary even when the vehicle engine is not operating, are supplied with current from the continuous-current-supplied terminal 30.
However, if it is assumed that by itself the voltage regulator of every such continuous-current-supplied unit consumes approximately 500 .mu.A, the quiescent current requirement of the transceiver (reception discriminator and output stage) between bus and electronics is approximately 150 .mu.A, and the quiescent current requirement of the respective unit peripherals (for example voltage dividers, sensor current sources, etc.) is in each case approximately 500 .mu.A, the resultant total quiescent current requirement for each unit is more than 1 mA.
If, in the example of a motor vehicle having bus-networked control units, 30 such units, for example, are present, this would mean a total quiescent current requirement of at least 30 mA. Thus, such a motor vehicle which has been taken out of service can no longer be started after approximately 3-4 weeks, on account of constant discharge of its battery. As a result, for motor vehicles which are to be shipped to a different continent, for example, it is necessary to disconnect the battery from the on-board electrical system prior to shipping, to ensure their startability at the destination.
Similar problems also arise in commercial vehicles for auxiliary technical deployment which are used only rarely, and whose dedicated technical equipment is bus-networked.
One object of the present invention therefore, is to provide a device for bus-networked operation of an electronic unit with a microcontroller, which permits the unit to be operated for as long as possible with reduced Ado activity, from a limited energy reserve.
Another object of the invention is to permit a bus-networked electronic unit to remain for as long as possible in operational quiescence or operating states with reduced activity, from a limited energy reserve, and to develop normal activity very rapidly in a controlled manner from such quiescence, or states with reduced activity.
Another object of the invention is to make it unnecessary to provide both the bus protocol function and the microcontroller for the purpose of maintaining both the wake-up capability of the unit and the perception capability regarding bus errors that occur.
To achieve these objects, the device according to the invention comprises a semiconductor circuit which can be supplied from a higher level or "superordinate" potential, arranged in the signal flow path between the two bus cores on the one hand and the bus protocol module on the other, and is capable of at least two operating modes: a "transmission and reception" mode (NORMAL) and a dormant or "sleep" mode (SLEEP). The device itself comprises a receiving unit which is connected to the two bus cores and whose output communicates with the reception input of the bus protocol function; a transmitting unit whose input communicates with the transmission output of the bus protocol function; a wake-up (activation) identification unit connected to the bus, which has a wake-up input, and a switching unit for providing, at a control output, a switch-on signal (ENA/NINH) after identification of a wake-up signal from the input or from the bus, and for emitting a switch-off signal (NENA/INH) in the operating mode "sleep" (SLEEP); a voltage regulator supplied from the superordinate potential, which provides a regulated output voltage to supply the microcontroller and the bus protocol module with operating power, and which has a control input that communicates with the control output of the semiconductor circuit, and is configured in such a way that it switches on in the presence of the switch-on signal (ENA/NINH) and switches off in the presence of the switch-off signal (NENA/INH).
In one embodiment of the invention, the regulator has autonomous means for the defined starting of the microcontroller as soon as the latter is provided with the operating voltage.
According to another feature of the invention, the semiconductor circuit is configured in such a way that, in the event of a bus error which impairs the normal method of communication via the two bus cores, the semiconductor circuit can be set, reconfigured or adapted for the best viable alternative for emergency communication via the bus, with regard to both the receiving means and the transmitting means, without any support by the microcontroller.
In another embodiment of the invention, the device comprises two termination elements which can be selected as a function of the number of bus subscribers, and its semiconductor circuit comprises a bus error identification unit and a cooperative bus termination changeover unit as well as a bus error and wake-up evaluation unit for conditioning at least one error or interrupt signal (ERR/INT), which can be output to the microcontroller, in the wake-up or bus error instance.
This embodiment facilitates a particularly rapid reaction to wake-up signals and bus errors, since software support in this regard is no longer necessary.
Further advantageous embodiments and features of the invention provide the following additional advantages:
After the build-up of the supply voltage for the microcontroller, a reset which is controlled from the voltage regulator, permits the output of at least one signal for setting the operating mode of the semiconductor circuit after a precisely defined time. This can be utilized for the purpose of testing the initialization section regulator-microcontroller for freedom from errors.
Even in the event of bus errors in the SLEEP mode, a wake-up capability via the bus is still maintained to the largest possible extent.
The bus termination can be controlled in a simple manner in different operating modes, even in the event of a fault, so that all essential elements can be integrated.
External auxiliary and protective circuitry are unnecessary.
An inherent disturbance or an inherent error in the unit does not impair the functioning of the remaining subscribers on the bus.
Latch-up of the bus network due to faults in the region of the transmitting output stage, its input signal path and, if appropriate, its state controller, is prevented.
Reduced current is consumed-in the second operating mode, even in the event of an error.
High interference immunity is provided in the operating state "sleep" (SLEEP).
Extensive integrability of all the back-up terminations is achieved.
This device provides rapid detection of bus faults and the fastest possible activation of an electronic unit equipped with it.
The superordinate power supply potential is monitored.
Detailed analysis of and reaction to various supply dip phenomena is provided.
Simple integrability and minimization of the number of terminals of a corresponding semiconductor circuit is provided.
Disconnection of the electronic unit from its power supply is detected.
The bus is not loaded in an uncontrolled manner in the event of failure of the operating voltage or when a unit is deliberately switched off, thereby maintaining undisturbed bus communication in the event of a supply defect or when a unit is switched off.
The system provides fastest possible, autonomous reaction of every unit equipped with the device to a bus error, without the requirement of bus communication. Reconfiguration which is provided for this purpose can be effected in such a way that message losses are completely precluded.
The invention provides high electromagnetic compatibility and high interference suppression, particularly in the event of a fault.
The semiconductor circuit is created as desired by design compilation, together with other semiconductor circuit functions, on a semiconductor chip.
The device achieves low production costs and small physical size and weight.
The device can be used in a means of transport.
Overall, the device permits all signal discriminators required for reception from the bus and the bus core drivers required for transmission (that is, the transmitting output stage), and all means for real-time bus error identification and handling, to be concentrated in a single semiconductor circuit. Consequently, this circuit represents the physical layer between the bus protocol chip or the bus protocol function of the relevant unit and the microcontroller thereof, and the two cores of a bus which is configured, by way of example, in accordance with the CAN standard. It is therefore unnecessary to operate the microcontroller to identify possible bus faults, and also to reconfigure the receiving and transmitting unit on a fault by fault basis in order to transition from the differential two-wire method of operation to a single-wire method of operation, for example via ground.
The functional autonomy of the device means that it is possible to dispense with software-supported tests on the bus, which are comparatively slow and, above all, occupy the bus protocol function. This improves the reaction speed of a corresponding network in the event of bus faults (thereby avoiding message losses).
The bus protocol chip no longer needs to monitor the bus for faults when the relevant electronic unit is to be switched off for the purpose of saving current. This is necessary so that the customary bus protocol chip or the corresponding protocol function can be switched off when the relevant unit is to be deactivated to save current. The ability to switch the bus protocol function off permits a considerable current saving because the voltage regulator of the relevant unit can thus be switched off. It is necessary to cover only the quiescent current of the device according to the invention.
The device draws this quiescent current past the voltage regulator of the relevant electronic unit directly from the superordinate power supply busbar--in other words, for example, from the central on-board electrical system terminal of a motor vehicle. By virtue of its connection to that potential, the device can also evaluate precisely this supply potential and/or monitor the proper functioning of the voltage regulator, to the extent that the bus is or remains disconnected in the event of a fault.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.